Packaging Math

How to Calculate Yield, Test Throughput, and Capacity in Advanced Packaging

The core math behind advanced packaging and test: compound yield stacking, sort and final test throughput, and burn-in capacity, worked with real numbers.

Advanced packaging yield is multiplicative, not additive, so you compound every step. If die attach runs 99.4 percent, flip chip bump join 99.1 percent, underfill 99.7 percent, and substrate assembly 99.5 percent, the package assembly yield is 0.994 times 0.991 times 0.997 times 0.995, which equals 0.9873, or 98.73 percent. Feed each stage yield from your Die Attach Yield, Flip Chip Yield, and Advanced Packaging Yield tools. The trap is treating a 5-step, 99 percent-each line as 99 percent overall; 0.99 to the fifth power is 95.1 percent, so you lose 3.9 points to stacking alone.

Known Good Die matters even more in chiplets because a multi-die module inherits the product of every die's KGD. For a module with 4 chiplets each at 99.0 percent KGD, module composite yield before assembly loss is 0.99 to the fourth, or 96.06 percent. Multiply by an assembly yield of 98.7 percent and you land at 94.8 percent module yield. The Chiplet Assembly Yield calculator does this stacking for mixed KGD inputs; a single 95 percent chiplet in an otherwise 99.5 percent module drags composite yield from 98.0 percent down to 93.1 percent.

Wafer sort capacity is driven by units per hour, which is 3600 divided by the effective index time in seconds. If touchdown test time is 1.8 seconds and prober index plus overtravel adds 0.7 seconds, effective time is 2.5 seconds, giving 1440 UPH per site. A 32-site card in parallel yields 32 times 1440, or 46,080 die per hour at 100 percent utilization. Apply a realistic 78 percent handler utilization and you get 35,942 die per hour. Enter site count, index time, and utilization into Wafer Sort Capacity to size your prober fleet.

Final test throughput follows the same units-per-hour logic but is gated by insertion time, not just test time. With a 4.2 second test program, a 1.1 second handler index, and 8 parallel sites, gross UPH is 3600 divided by (4.2 plus 1.1) times 8, which is 3600 divided by 5.3 times 8, equal to 5434 UPH. Multiply by 0.82 uptime for 4456 UPH net. Final Test Throughput lets you vary parallelism; moving from 8 to 16 sites here lifts net throughput to roughly 8900 UPH if the tester resources scale cleanly.

Burn-in capacity is a board-and-oven problem. If each burn-in board holds 96 devices, an oven holds 40 boards, and the burn-in recipe is 24 hours plus 2 hours load and unload, each oven cycles once every 26 hours. Daily throughput per oven is 96 times 40 times (24 divided by 26), which is 3840 times 0.923, or 3545 devices per day. For 200,000 devices per week at that rate you need 200000 divided by (3545 times 7), which is 8.06, so 9 ovens with margin. Burn-in Capacity handles board count, recipe hours, and oven count directly.

Wire bond workload converts bonds into machine hours. A package with 240 wires bonded at 12 bonds per second needs 240 divided by 12, or 20 seconds of pure bond time, plus roughly 8 seconds of indexing and inspection, giving 28 seconds per unit. That is 128.6 units per hour per bonder. For 50,000 units per week you need 50000 divided by (128.6 times 120 available hours), which is 3.24, so 4 bonders. Wire Bond Workload sizes this from wire count, bond rate, and shift hours so you do not under-provision the bond floor.

Always carry units explicitly and convert once. Yields stay as decimals until the final percent, throughput stays in units per hour until you multiply by available hours, and capacity ends in units per shift, day, or week. A frequent error is mixing die per wafer into package-level throughput without accounting for gross die, edge exclusion, and sort yield; if a 300 mm wafer holds 1200 gross die at 92 percent sort yield, only 1104 known good die flow to assembly, and that is the number your packaging line actually sees.

Tie the chain together for planning. Start from wafer sort good die, apply Advanced Packaging Yield stacking to get good packages, then confirm the assembly line and test cells can absorb that volume using Wafer Sort Capacity, Final Test Throughput, and Burn-in Capacity. If sort delivers 35,000 KGD per hour but final test nets 4456 UPH per tester, you need eight testers running to avoid a WIP pileup. Sizing every stage in the same units per hour basis is what keeps a packaging and test line balanced rather than bottlenecked.

Published 2026-07-01.